LM3S300-IQN25-C2 Datasheet, PDF (263/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S300 Microcontroller
Figure 8-1. GPTM Module Block Diagram
Interrupt / Config
TimerA
Interrupt
TimerB
Interrupt
GPTMCFG
GPTMCTL
GPTMIMR
GPTMRIS
GPTMMIS
GPTMICR
TimerA Control
GPTMTAPMR
GPTMTAPR
GPTMTAMATCHR
GPTMTAILR
GPTMTAMR
TimerB Control
GPTMTBPMR
GPTMTBPR
GPTMTBMATCHR
GPTMTBILR
GPTMTBMR
0x0000 (Down Counter Modes)
TA Comparator
GPTMAR En
GPTMTBR En
TB Comparator
Clock / Edge
Detect
32 KHz or
Even CCP Pin
RTC Divider
Clock / Edge
Detect
Odd CCP Pin
System
Clock
0x0000 (Down Counter Modes)
Table 8-1. Available CCP Pins
Timer
Timer 0
Timer 1
Timer 2
16-Bit Up/Down Counter
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
Even CCP Pin
CCP0
-
CCP2
-
CCP4
-
Odd CCP Pin
-
CCP1
-
CCP3
-
CCP5
8.2 Signal Description
Table 8-2 on page 263lists the external signals of the GP Timer module and describes the function
of each. The GP Timer signals are alternate functions for some GPIO signals and default to be
GPIO signals at reset. The column in the table below titled "Pin Assignment" lists the possible GPIO
pin placements for these GP Timer signals. The AFSEL bit in the GPIO Alternate Function Select
(GPIOAFSEL) register (page 240) should be set to choose the GP Timer function. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 222.
Table 8-2. General-Purpose Timers Signals (48QFP)
Pin Name
Pin Number Pin Type Buffer Type^a Description
CCP0
45
I/O
TTL
Capture/Compare/PWM 0.
CCP1
3
I/O
TTL
Capture/Compare/PWM 1.
CCP2
46
I/O
TTL
Capture/Compare/PWM 2.
June 18, 2012
263
Texas Instruments-Production Data