LM3S300-IQN25-C2 Datasheet, PDF (273/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S300 Microcontroller
Table 8-4. Timers Register Map (continued)
Offset Name
Type
Reset
Description
0x008 GPTMTBMR
0x00C GPTMCTL
0x018 GPTMIMR
0x01C GPTMRIS
0x020 GPTMMIS
0x024 GPTMICR
0x028 GPTMTAILR
0x02C GPTMTBILR
0x030 GPTMTAMATCHR
0x034 GPTMTBMATCHR
0x038 GPTMTAPR
0x03C GPTMTBPR
0x040 GPTMTAPMR
0x044 GPTMTBPMR
0x048 GPTMTAR
0x04C GPTMTBR
R/W
R/W
R/W
RO
RO
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0xFFFF.FFFF
0x0000.FFFF
0xFFFF.FFFF
0x0000.FFFF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0xFFFF.FFFF
0x0000.FFFF
GPTM TimerB Mode
GPTM Control
GPTM Interrupt Mask
GPTM Raw Interrupt Status
GPTM Masked Interrupt Status
GPTM Interrupt Clear
GPTM TimerA Interval Load
GPTM TimerB Interval Load
GPTM TimerA Match
GPTM TimerB Match
GPTM TimerA Prescale
GPTM TimerB Prescale
GPTM TimerA Prescale Match
GPTM TimerB Prescale Match
GPTM TimerA
GPTM TimerB
See
page
277
279
282
284
285
286
288
289
290
291
292
293
294
295
296
297
8.6 Register Descriptions
The remainder of this section lists and describes the GPTM registers, in numerical order by address
offset.
June 18, 2012
273
Texas Instruments-Production Data