LM3S300-IQN25-C2 Datasheet, PDF (414/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

NRND: Not recommended for new designs.
Inter-Integrated Circuit (I²C) Interface
Table 12-3. Inter-Integrated Circuit (I²C) Interface Register Map (continued)
Offset Name
I²C Slave
0x800 I2CSOAR
0x804 I2CSCSR
0x808 I2CSDR
0x80C I2CSIMR
0x810 I2CSRIS
0x814 I2CSMIS
0x818 I2CSICR
Type
Reset
Description
R/W
0x0000.0000 I2C Slave Own Address
RO
0x0000.0000 I2C Slave Control/Status
R/W
0x0000.0000 I2C Slave Data
R/W
0x0000.0000 I2C Slave Interrupt Mask
RO
0x0000.0000 I2C Slave Raw Interrupt Status
RO
0x0000.0000 I2C Slave Masked Interrupt Status
WO
0x0000.0000 I2C Slave Interrupt Clear
See
page
428
429
431
432
433
434
435
12.6
Register Descriptions (I²C Master)
The remainder of this section lists and describes the I²C master registers, in numerical order by
address offset. See also “Register Descriptions (I²C Slave)” on page 427.
414
June 18, 2012
Texas Instruments-Production Data