LM3S300-IQN25-C2 Datasheet, PDF (477/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S300 Microcontroller
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0
PRI2, type R/W, offset 0x408, reset 0x0000.0000
INTD
INTC
INTB
INTA
PRI3, type R/W, offset 0x40C, reset 0x0000.0000
INTD
INTC
INTB
INTA
PRI4, type R/W, offset 0x410, reset 0x0000.0000
INTD
INTC
INTB
INTA
PRI5, type R/W, offset 0x414, reset 0x0000.0000
INTD
INTC
INTB
INTA
PRI6, type R/W, offset 0x418, reset 0x0000.0000
INTD
INTC
INTB
INTA
PRI7, type R/W, offset 0x41C, reset 0x0000.0000
INTD
INTC
INTB
INTA
SWTRIG, type WO, offset 0xF00, reset 0x0000.0000
Cortex-M3 Peripherals
System Control Block (SCB) Registers
Base 0xE000.E000
CPUID, type RO, offset 0xD00, reset 0x410F.C231
IMP
PARTNO
INTCTRL, type R/W, offset 0xD04, reset 0x0000.0000
NMISET
PENDSV UNPENDSV PENDSTSET PENDSTCLR
VECPEND
RETBASE
VTABLE, type R/W, offset 0xD08, reset 0x0000.0000
BASE
OFFSET
APINT, type R/W, offset 0xD0C, reset 0xFA05.0000
ENDIANESS
SYSCTRL, type R/W, offset 0xD10, reset 0x0000.0000
PRIGROUP
VAR
ISRPRE ISRPEND
OFFSET
VECTKEY
INTID
CON
REV
VECACT
VECPEND
SYSRESREQ VECTCLRACT VECTRESET
CFGCTRL, type R/W, offset 0xD14, reset 0x0000.0000
SEVONPEND
SLEEPDEEP SLEEPEXIT
SYSPRI1, type R/W, offset 0xD18, reset 0x0000.0000
BUS
SYSPRI2, type R/W, offset 0xD1C, reset 0x0000.0000
SVC
STKALIGN BFHFNMIGN
USAGE
MEM
DIV0 UNALIGNED
MAINPEND BASETHR
SYSPRI3, type R/W, offset 0xD20, reset 0x0000.0000
TICK
PENDSV
DEBUG
June 18, 2012
477
Texas Instruments-Production Data