LM3S300-IQN25-C2 Datasheet, PDF (20/498 Pages) Texas Instruments – Stellaris LM3S300 Microcontroller

Revision History
NRND: Not recommended for new designs.
Table 1. Revision History (continued)
Date
September 2010
Revision
7783
Description
■ Reorganized ARM Cortex-M3 Processor Core, Memory Map and Interrupts chapters, creating two
new chapters, The Cortex-M3 Processor and Cortex-M3 Peripherals. Much additional content was
added, including all the Cortex-M3 registers.
■ Changed register names to be consistent with StellarisWare names: the Cortex-M3 Interrupt Control
and Status (ICSR) register to the Interrupt Control and State (INTCTRL) register, and the
Cortex-M3 Interrupt Set Enable (SETNA) register to the Interrupt 0-31 Set Enable (EN0) register.
■ Added clarification of instruction execution during Flash operations.
■ Modified Figure 7-1 on page 225 to clarify operation of the GPIO inputs when used as an alternate
function.
■ Added caution not to apply a Low value to PB7 when debugging; a Low value on the pin causes
the JTAG controller to be reset, resulting in a loss of JTAG communication.
■ In General-Purpose Timers chapter, clarified operation of the 32-bit RTC mode.
■ Added missing table "Connections for Unused Signals" (Table 15-5 on page 457).
■ In Electrical Characteristics chapter:
– Added I_LKG parameter (GPIO input leakage current) to Table 17-4 on page 460.
– Corrected values for t_CLKRF parameter (SSIClk rise/fall time) in Table 17-13 on page 467.
■ Added dimensions for Tray and Tape and Reel shipping mediums.
June 2010
April 2010
7393
7004
■ Corrected base address for SRAM in architectural overview chapter.
■ Clarified system clock operation, adding content to “Clock Control” on page 155.
■ In Signal Tables chapter, added table "Connections for Unused Signals."
■ In "Reset Characteristics" table, corrected value for supply voltage (VDD) rise time.
■ Additional minor data sheet clarifications and corrections.
■ Added caution note to the I²C Master Timer Period (I2CMTPR) register description and changed
field width to 7 bits.
■ Added note about RST signal routing.
■ Clarified the function of the TnSTALL bit in the GPTMCTL register.
■ Additional minor data sheet clarifications and corrections.
20
June 18, 2012
Texas Instruments-Production Data