LAN83C175 Datasheet, PDF (88/92 Pages) SMSC Corporation – Ethernet CARDBUS Integrated Controller With Modem Support

NAME
t1
t3
t6
t5
t4
t7
t8
t2
MIN (NS)
90
15
15-45
60
15
0
Selectable
Table 5 - Modem Access Timings
MAX (NS)
DESCRIPTION
Chip select pulse width.
Data setup time before write pulse active.
Address setup time before write or read pulse, optionally
increased for devices requiring longer address setup times.
Write pulse width
Chip select, data, and address hold time after write pulse
becomes inactive
50-80 Expected data valid on data pins, optionally increased for
devices with slower access times.
Data hold time required after read pulse goes inactive.
Minimum access delay enforced between modem accesses.
Delay determined by preloaded EPIC/C internal register,
NVCTL_m(12:9) from 0 to 15 cbclk periods.
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