LAN83C175 Datasheet, PDF (65/92 Pages) SMSC Corporation – Ethernet CARDBUS Integrated Controller With Modem Support

Modem Registers Bits Description
80 - NVCTL_m Register
14 - FETPWRMDM: This signal controls the fet
power output to the modem. It will power up
low, preventing any power from reaching the
modem if the output pin is used.
13 - MDM_INT_HL: This controls the expected
polarity of the interrupt from the modem. If this
signal is high, the interrupt expected is active
high. If this signal is low, the interrupt is
expected to be low.
12 through 9 - MDM_ACS_DLY: These signals
will enforce a delay between accesses to the
modem during quick host accesses to the
modem address space. It can be set to between
0 and 15 cbclk periods of enforced delay,
depending on the requirements of the attached
modem. A value of 6 in this register will enforce
an interval of ~215 ns between modem
accesses, and is the recommended value unless
the modem used specifically allows a shorter
inter-access time.
8 - MDM_XTND_SETUP: When set high, this
will increase setup times during access to the
external modem. During writes, the address will
be driven 1 cbclk length longer than normal.
During reads, the address will be driven one
cbclk before chip select and output enable are
active, and chip select and output enable will be
driven one cbclk length longer than normal
before data is strobed into the EPIC/C. For
Rockwell modems, this value can be a 0, while
for Lucent modems, this value should be a 1.
7 - RESETM_N: The status of this signal will be
reflected on the external pin RESETM_N.
6 - INT_EVNT_MSK(1): This bit is an interrupt
mask for the RDYM signal. If this bit is low, an
interrupt event will not occur, preventing an
interrupt to the host being issued when RDYM
transitions from 0 to 1. Note that if
STATUSREG_EN is high, this will also prevent
a host interrupt from being generated when
RDYM transitions.
5 - INT_EVNT_MSK(0): This bit is an interrupt
mask for the RINGIN signal. If this bit is low, an
interrupt event will not occur, preventing an
interrupt to the host being issued when RINGIN
transitions from 0 to 1. Note that if
STATUSREG_EN is high, this will also prevent
a host interrupt from being generated when
RINGIN transitions.
4 and 3 - Unused.
2 - PDWNM: The value of this bit will be driven
out on the POWERDWNM pin of the device. It
is intended to send a powerdown signal to the
external modem.
1 - STS_EVNT_MSK(1): This bit is a status
event mask for the modem present state register
bit 1 and modem event function register bit 1.
When this signal is low, the RDYM signal
transitioning from 0 to 1 will not log an event.
0 - STS_EVNT_MSK(0): This bit is a status
event mask for the modem present state register
bit 1. When this signal is low, the RINGIN
signal transitioning from 0 to 1 will not log an
event.
65