LAN83C175 Datasheet, PDF (52/92 Pages) SMSC Corporation – Ethernet CARDBUS Integrated Controller With Modem Support

9C - CardBus RECEIVE RAM PACKET
ADDRESS
Reset Value: The PRLPAR register will always
point to the starting address of the internal
receive memory after reset. The actual
address will be determined by the memory
size jumper settings:
SIZE
128K
32K
16K
0
RESET VALUE
100000000000000000
001000000000000000
000100000000000000
000000000000000000
This register contains the byte address of the
beginning of the frame currently being copied
from the local receive RAM. The two lsb’s are
fixed at zero so the address will always be
dword aligned.
31 through 18 - Unused.
17 through 2 - RX RAM Address.
1 through 0 - Not writable - always return
zeroes.
A0 - CardBus RECEIVE END OF FRAME
ADDRESS
Reset Value: xxxxxxxxxxxxxxxxxx
This register contains the byte address of the
DWORD location immediately following the
end of the current frame in the local receive
RAM. The two lsb’s contain the number of
valid bytes in the last DWORD of the frame.
31 through 18 - Unused.
17 through 2 - RX RAM ADDRESS.
1 and 0 - ENDING BYTE COUNT.
A4 - CardBus RECEIVE DMA STATUS
Reset Value:
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
This register contains the status word that will be
posted to the receive descriptor chain after a
frame has been copied. It includes the status and
length of the copied frame as well as the receive
DMA status. This register may be read when the
host chooses not to copy a frame in receive
lookahead mode. Otherwise, it should only be
accessed for test purposes.
31 through 16 - RECEIVE FRAME LENGTH:
Number of bytes in the received frame.
15 - OWNER: Descriptor ownership bit - This bit
is writable at this location but may only be read at
bit 19 in the PRDLGTH register. When read here,
this bit always returns 0 to set descriptor
ownership to the host.
14 - HEADER COPIED: Set when the receive
status is posted after a header copy. This bit is
read only.
13 - FRAGMENT LIST ERROR: Set when all
buffers in the fragment list have been filled before
the entire receive frame is copied. This bit is read
only.
12 - NETWORK STATUS VALID: Set when bits 6
through 0 contain the status from the current
frame and bits 31-16 contain the frame length. In
the case of a header copy or fragment list error,
the receive status from the current frame may or
may not be posted. In all other cases this bit will
be set. This bit is read only.
11 through 7: Reserved.
6 - RECEIVER DISABLED: This bit is set when
the receiver is in monitor mode. Always returns 0.
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