|
C8051F330-GMR Datasheet, PDF (99/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU | |||
|
◁ |
C8051F330/1/2/3/4/5
Table 10.1. Reset Electrical Characteristics
â40 to +85 °C unless otherwise specified.
Parameter
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
VDD POR Threshold (VRST)
Missing Clock Detector Time-
out
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
VDD Monitor Turn-on Time
VDD Monitor Supply Current
Conditions
IOL = 8.5 mA, ï
VDD = 2.7 V to 3.6 V
RST = 0.0 V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code ï
execution at location 0x0000
Min
â
0.7 x VDD
â
â
2.40
100
â
15
100
â
Typ
â
â
â
25
2.55
220
â
â
â
20
Max Units
0.6
V
â
V
0.3 x VDD
40
µA
2.70
V
600
µs
32
µs
â
µs
â
µs
50
µA
102
Rev. 1.7
|
▷ |