C8051F330-GMR Datasheet, PDF (34/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU

C8051F330/1/2/3/4/5
Table 4.1. Pin Definitions for the C8051F330/1/2/3/4/5 (Continued)
Name
P0.6/
Pin
‘F330/1/2/
3/4/5-GM
Pin
’F330-GP
Type
Description
15
18 D I/O or Port 0.6. See Section 14 for a complete description.
A In
CNVSTR
P0.7
14
P1.0
13
P1.1
12
P1.2
11
P1.3
10
P1.4
9
P1.5
8
P1.6
7
P1.7
6
D In ADC0 External Convert Start or IDA0 Update Source Input.
See Section 5 and Section 6 for a complete description.
17 D I/O or Port 0.7. See Section 14 for a complete description.
A In
16 D I/O or Port 1.0. See Section 14 for a complete description.
A In
15 D I/O or Port 1.1. See Section 14 for a complete description.
A In
14 D I/O or Port 1.2. See Section 14 for a complete description.
A In
13 D I/O or Port 1.3. See Section 14 for a complete description.
A In
12 D I/O or Port 1.4. See Section 14 for a complete description.
A In
11 D I/O or Port 1.5. See Section 14 for a complete description.
A In
10 D I/O or Port 1.6. See Section 14 for a complete description.
A In
9
D I/O or Port 1.7. See Section 14 for a complete description.
A In
36
Rev. 1.7