C8051F330-GMR Datasheet, PDF (206/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU

C8051F330/1/2/3/4/5
C2 Register Definition 20.3. REVID: C2 Revision ID
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
This read-only register returns the 8-bit revision ID: 0x00 (Revision A).
C2 Register Definition 20.4. FPCTL: C2 Flash Programming Control
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits7–0
FPCTL: Flash Programming Control Register.
This register is used to enable Flash programming via the C2 interface. To enable C2 Flash
programming, the following codes must be written in order: 0x02, 0x01. Note that once C2
Flash programming is enabled, a system reset must be issued to resume normal operation.
C2 Register Definition 20.5. FPDAT: C2 Flash Programming Data
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits7–0: FPDAT: C2 Flash Programming Data Register.
This register is used to pass Flash commands, addresses, and data during C2 Flash
accesses. Valid commands are listed below.
Code
0x06
0x07
0x08
0x03
Command
Flash Block Read
Flash Block Write
Flash Page Erase
Device Erase
210
Rev. 1.7