C8051F330-GMR Datasheet, PDF (26/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU

C8051F330/1/2/3/4/5
1.7. 10-Bit Analog to Digital Converter
The C8051F330/2/4 devices include an on-chip 10-bit SAR ADC with a 16-channel differential input multi-
plexer. With a maximum throughput of 200 ksps, the ADC offers true 10-bit linearity with an INL and DNL of
±1 LSB. The ADC system includes a configurable analog multiplexer that selects both positive and nega-
tive ADC inputs. Ports0-1 are available as an ADC inputs; additionally, the on-chip Temperature Sensor
output and the power supply voltage (V_DD) are available as ADC inputs. User firmware may shut down the
ADC to save power.
Conversions can be started in six ways: a software command, an overflow of Timer 0, 1, 2, or 3, or an
external convert start signal. This flexibility allows the start of conversion to be triggered by software
events, a periodic signal (timer overflows), or external HW signals. Conversion completions are indicated
by a status bit and an interrupt (if enabled). The resulting 10-bit data word is latched into the ADC data
SFRs upon completion of a conversion.
Window compare registers for the ADC data can be configured to interrupt the controller when ADC data is
either within or outside of a specified range. The ADC can monitor a key voltage continuously in back-
ground mode, but not interrupt the controller unless the converted data is within/outside the specified
range.
P0.0
P0.7
P1.0
Temp
Sensor
P1.7
VDD
P0.0
P0.7
P1.0
P1.7
VREF
GND
AMX0P
ADC0CN
18-to-1
AMUX
18-to-1
AMUX
AMX0N
VDD
000
Start
Conversion ⁰⁰¹
010
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
011
Timer 1 Overflow
100
CNVSTR Input
10-Bit
(+)
SAR
101
Timer 3 Overflow
(-)
ADC
ADC0CF
ADC0LTH ADC0LTL
ADC0GTH ADC0GTL
AD0WINT
Window
Compare
32 _Logic
Figure 1.14. 10-Bit ADC Block Diagram
28
Rev. 1.7