C8051F330-GMR Datasheet, PDF (78/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU

C8051F330/1/2/3/4/5
Table 9.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address
Description
OSCXCN
0xB1
External Oscillator Control
P0
0x80
Port 0 Latch
P0MDIN
0xF1
Port 0 Input Mode Configuration
P0MDOUT
0xA4
Port 0 Output Mode Configuration
P0SKIP
0xD4
Port 0 Skip
P1
0x90
Port 1 Latch
P1MDIN
0xF2
Port 1 Input Mode Configuration
P1MDOUT
0xA5
Port 1 Output Mode Configuration
P1SKIP
0xD5
Port 1 Skip
P2
0xA0
Port 2 Latch
P2MDOUT
0xA6
Port 2 Output Mode Configuration
PCA0CN
0xD8
PCA Control
PCA0CPH0
0xFC
PCA Capture 0 High
PCA0CPH1
0xEA
PCA Capture 1 High
PCA0CPH2
0xEC
PCA Capture 2 High
PCA0CPL0
0xFB
PCA Capture 0 Low
PCA0CPL1
0xE9
PCA Capture 1 Low
PCA0CPL2
0xEB
PCA Capture 2 Low
PCA0CPM0
0xDA
PCA Module 0 Mode Register
PCA0CPM1
0xDB
PCA Module 1 Mode Register
PCA0CPM2
0xDC
PCA Module 2 Mode Register
PCA0H
0xFA
PCA Counter High
PCA0L
0xF9
PCA Counter Low
PCA0MD
0xD9
PCA Mode
PCON
0x87
Power Control
PSCTL
0x8F
Program Store R/W Control
PSW
0xD0
Program Status Word
REF0CN
0xD1
Voltage Reference Control
RSTSRC
0xEF
Reset Source Configuration/Status
SBUF0
0x99
UART0 Data Buffer
SCON0
0x98
UART0 Control
SMB0CF
0xC1
SMBus Configuration
SMB0CN
0xC0
SMBus Control
SMB0DAT
0xC2
SMBus Data
Page
117
130
130
131
131
131
132
132
132
133
133
205
208
208
208
208
208
208
207
207
207
208
208
206
95
108
84
62
101
159
158
142
144
146
Rev. 1.7
81