C8051F330-GMR Datasheet, PDF (162/210 Pages) Silicon Laboratories – Mixed-Signal ISP Flash MCU

C8051F330/1/2/3/4/5
Master
Device 1
NSS
MISO
MOSI
SCK
GPIO
GPIO
MISO
MOSI
SCK
NSS
Master
Device 2
Figure 17.2. Multiple-Master Mode Connection Diagram
Master
Device MISO
MOSI
SCK
Slave
MISO Device
MOSI
SCK
Figure 17.3. 3-Wire Single Master and 3-Wire Single Slave Mode Connection
Diagram
Master
Device
GPIO
MISO
MOSI
SCK
NSS
MISO
MOSI
SCK
NSS
Slave
Device
MISO
MOSI
SCK
NSS
Slave
Device
Figure 17.4. 4-Wire Single Master Mode and 4-Wire Slave Mode Connection
Diagram
166
Rev. 1.7