SI5347_16 Datasheet, PDF (44/55 Pages) Silicon Laboratories – Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators

Pin
Name
LOL_Ab
LOL_Bb
LOL_Cb
LOL_Db
LOS_XAXBb
Si5347A/B
3
4
5
47
25
Pin Number
Si5347C/D
3
4
5
47
25
Si5346
28
27
—
—
33
DSPLL_SEL
26
26
—
0
DSPLL_SEL
27
27
—
1
FDEC
42
42
—
FINC
48
48
—
RSVD
20
20
—
21
21
—
—
29
—
—
30
—
—
31
—
—
33
—
—
34
—
—
35
—
—
52
—
—
53
—
—
54
—
55
55
—
56
56
—
—
57
—
—
58
—
—
59
—
Pin
Type²
O
O
O
O
O
I
I
I
I
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Si5347/46 Rev D Data Sheet
Pin Descriptions
Function
Loss Of Lock_A/B/C/D.^{3, 4} These output pins indicate
when DSPLL A, B, C, D is out-of-lock (low) or locked
(high). They can be left unconnected when not in use.
Si5347: See Note 3, Si5346: See Note 4.
Status Pins.³ This pin indicates a loss of signal alarm on
the XA/XB pins. This either indicates a XTAL failure or a
loss of external signal on the XA/XB pins. This pin can be
left unconnected when unused.
DSPLL Select Pins (Si5347 only).³ These pins are used
in conjunction with the FINC and FDEC pins. The
DSPLL_SEL[1:0] pins determine which DSPLL is affected
by a frequency change using the FINC and FDEC pins.
See 3.4 Digitally-Controlled Oscillator (DCO) Mode for de-
tails. These pins are internally pulled-down.
Frequency Decrement Pin (Si5347 only).⁴ This pin is
used to step-down the output frequency of a selected
DSPLL. The frequency change step size is register config-
urable. The DSPLL that is affected by the frequency
change is determined by the DSPLL_SEL[1:0] pins. This
pin must be pulled up or down externally (do not leave
floating when not in use).
Frequency Increment Pin (Si5347 only).³ This pin is
used to step-up the output frequency of a selected DSPLL.
The frequency change step size is register configurable.
The DSPLL that is affected by the frequency change is de-
termined by the DSPLL_SEL[1:0] pins. This pin is pulled
low internally and can be left unconnected when not in
use.
Reserved. These pins are connected to the die. Leave
disconnected.
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