SI5347_16 Datasheet, PDF (43/55 Pages) Silicon Laboratories – Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators

Pin
Name
Si5347A/B
Serial Interface
I2C_SEL
39
Pin Number
Si5347C/D
39
Si5346
38
SDA/SDIO
18
18
13
A1/SDO
17
17
15
SCLK
16
16
14
A0/CSb
19
19
16
Control/Status
INTRb
12
12
17
RSTb
6
6
3
OE0b
11
11
12
OE1b
41
41
—
—
—
37
Pin
Type²
Si5347/46 Rev D Data Sheet
Pin Descriptions
Function
I
I2C Select.³ This pin selects the serial interface mode as
I²C (I2C_SEL = 1) or SPI (I2C_SEL = 0). This pin is inter-
nally pulled high.
I/O
Serial Data Interface.³ This is the bidirectional data pin
(SDA) for the I²C mode, or the bidirectional data pin
(SDIO) in the 3-wire SPI mode, or the input data pin (SDI)
in 4-wire SPI mode. When in I²C mode, this pin must be
pulled-up using an external resistor of
> 1 kΩ. No pull-up resistor is needed when in SPI mode.
I/O
Address Select 1/Serial Data Output.³ In I²C mode this
pin functions as the A1 address input pin. In 4-wire SPI
mode this is the serial data output (SDO) pin.
I
Serial Clock Input.³ This pin functions as the serial clock
input for both I²C and SPI modes. When in I²C mode, this
pin must be pulled-up using an external resistor of > 1 kΩ.
No pull-up resistor is needed when in SPI mode.
I
Address Select 0/Chip Select.³ This pin functions as the
hardware controlled address A0 in I²C mode. In SPI
mode, this pin functions as the chip select input (active
low). This pin is internally pulled-up.
O
Interrupt.³ This pin is asserted low when a change in de-
vice status has occurred. It should be left unconnected
when not in use.
I
Device Reset.³ Active low input that performs power-on
reset (POR) of the device. Resets all internal logic to a
known state and forces the device registers to their default
values. Clock outputs are disabled during reset. This pin is
internally pulled-up.
I
Output Enable 0.³ This pin is used to enable (when held
low) and disable (when held high) the output clocks. By
default this pin controls all outputs. It can also be config-
ured to control a subset of outputs. See 3.8.9 Output Ena-
ble/Disable for details. This pin is internally pulled-down.
Output Enable 1. (Si5347)⁴ This is an additional output
enable pin that can be configured to control a subset of
outputs. By default it has no control on the outputs until
configured. See 3.8.9 Output Enable/Disable for details.
There is no internal pull-up/pull-down for this pin. This pin
must be pulled up or down externally (do not leave floating
when not in use).
Output Enable 1. (Si5346)³ This is an additional output
enable pin that can be configured to control a subset of
outputs. By default it has no control on the outputs until
configured. See 3.8.9 Output Enable/Disable for details.
This pin is internally pulled-down.
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