K5A3X40YTC Datasheet, PDF (9/45 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM

K5A3x40YT(B)C
Preliminary
MCP MEMORY
NOTES:
1. RA : Read Address, PA : Program Address, RD : Read Data, PD : Program Data
DA : Dual Bank Address (A19 - A20), BA : Block Address (A12 - A20), X = Don’t care .
2. To terminate the Autoselect Mode, it is necessary to write Reset command to the register.
3. The 4th cycle data of Autoselect mode is output data.
The 3rd and 4th cycle bank addresses of Autoselect mode must be same.
4. The Read / Program operations at non-erasing blocks and the autoselect mode are allowed in the Erase Suspend mode.
5. The Erase Suspend command is applicable only to the Block Erase operation.
6. DQ8 - DQ15 are don’t care in command sequence, except for RD and PD.
7. A11 - A20 are also don’t care, except for the case of special notice.
Table 6. Flash Memory Autoselect Codes
Description
DQ8 to DQ15
BYTE_F = VIH
BYTE_F = VIL
Manufacturer ID
Device Code K5A3240YT (Top Boot Block)
X
X
22H
X
Device Code K5A3240YB (Bottom Boot Block)
22H
X
Device Code K5A3340YT (Top Boot Block)
22H
X
Device Code K5A3340YB (Bottom Boot Block)
22H
X
Block Protection Verification
X
X
Secode Block Indicator Bit (DQ7)
X
X
DQ7 to DQ0
ECH
A0H
A2H
A1H
A3H
01H (Protected),
00H (Unprotected)
80H (Factory locked),
00H (Not factory locked)
Table 7. Flash Memory Operation Table
Operation
Read
word
byte
Stand-by
Output Disable
Reset
Write
word
byte
Enable Block Group
Protect (3)
Enable Block Group
Unprotect (3)
Temporary Block
Group
CE_F
L
L
Vcc_F ±
0.3V
L
X
L
L
L
L
X
OE WE BYTE_F
L
H
H
L
H
L
X
X
X
H
H
X
X
X
X
H
L
H
H
L
L
H
L
X
H
L
X
X
X
X
WP/
ACC
L/H
(2)
L/H
L/H
(4)
L/H
(4)
(4)
A9 A6 A1 A0
A9 A6 A1 A0
A9 A6 A1 A0
X XXX
X XXX
X XXX
A9 A6 A1 A0
A9 A6 A1 A0
X LHL
X HHL
X XXX
DQ15/
A-1
DQ15
A-1
High-Z
High-Z
High-Z
DIN
A-1
X
X
X
DQ8/
DQ14
DOUT
High-Z
High-Z
High-Z
High-Z
DIN
High-Z
X
X
X
DQ0/
DQ7
DOUT
DOUT
High-Z
High-Z
High-Z
DIN
DIN
DIN
DIN
X
RESET
H
H
(2)
H
L
H
H
VID
VID
VID
NOTES:
1. L = VIL (Low), H = VIH (High), VID = 8.5V~12.5V, DIN = Data in, DOUT = Data out, X = Don't care.
2. WP/ACC and RESET ball are asserted at Vcc_F±0.3 V or Vss±0.3 V in the Stand-by mode.
3. Addresses must be composed of the Block address (A12 - A20).
The Block Protect and Unprotect operations may be implemented via programming equipment too.
Refer to the "Block Group Protection and Unprotection".
4. If WP/ACC=VIL, the two outermost boot blocks is protected. If WP/ACC=VIH, the two outermost boot block protection depends on whether those
blocks were last protected or unprotected using the method described in "Block Group Protection and Unprotection". If WP/ACC=VHH, all blocks
will be temporarily unprotected.
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Revision 0.0
November 2002