K5A3X40YTC Datasheet, PDF (27/45 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM

K5A3x40YT(B)C
Preliminary
MCP MEMORY
DC CHARACTERISTICS(Continued)
Parameter
Automatic Sleep Mode
Voltage for WP/ACC Block
Temporarily Unprotect and
Flash _{Program Acceleration (4)}
Symbol
Test Conditions
ISB3 VIH=Vcc_F±0.3V, VIL=VSS±0.3V, OE=VIL, IOL=IOH=0
VHH Vcc_F = 3.0V ± 0.3V
Min Typ Max Unit
-
5 18 µA
8.5 - 12.5 V
Voltage for Autoselect and
Block Protect (4)
VID Vcc_F = 3.0V ± 0.3V
8.5 - 12.5 V
Low Vcc_F Lock-out Voltage (5) VLKO
1.8 - 2.5 V
Operating Current
Cycle time=1µs, 100% duty, CS1_S≤0.2,
ICC1
CS2_S≥Vcc_S-0.2V, LB≤0.2V and/or UB≤0.2V
All outputs open, VIN≤0.2V or VIN≥Vcc_S-0.2V,
BYTE_S=Vcc_S± 0.3V or Vss± 0.3V
-
-
3 mA
SRAM
Cycle time=Min, 100% duty, CS1_S=VIL, CS2_S=VIH,
ICC2 LB=VIL and/or UB= VIL, All outputs open, VIN=VIL or
-
20 27 mA
VIH, BYTE_S=Vcc_S± 0.3V or Vss± 0.3V
Standby Current
CS1_S≥Vcc_S-0.2V, CS2_S≥Vcc_S-0.2V (CS1_S controlled)
ISB
or CS2_S≤0.2V (CS2_S controlled),
BYTE_S=Vcc_S± 0.3V or Vss± 0.3V,
-
Other input =0~Vcc_S
0.5 10 µA
NOTES:
1. The ICC current listed includes both the DC operating current and the frequency dependent component(at 5 MHz).
The read current is typically 14 mA (@ Vcc_F=3.0V , OE at VIH.)
2. ICC active during Internal Routine(program or erase) is in progress.
3. ICC active during Read while Write is in progress.
4. The high voltage ( VHH or VID ) must be used in the range of Vcc_F = 3.0V ± 0.3V
5. Not 100% tested.
6. Typical values are measured at Vcc_F = Vcc_S = 3.0V, Ta=25°C , not 100% tested.
CAPACITANCE(TA = 25 °C, Vcc_F = Vcc_S = 3.3V, f = 1.0MHz)
Item
Symbol
Test Condition
Min
Input Capacitance
CIN
VIN=0V
-
Output Capacitance
COUT
VOUT=0V
-
Control Ball Capacitance
CIN2
VIN=0V
-
NOTE: Capacitance is periodically sampled and not 100% tested.
Max
18
20
18
Unit
pF
pF
pF
AC TEST CONDITION
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Value
0V to Vcc
5ns
Vcc/2
CL = 30pF
Vcc
Vcc/2
0V
Input & Output
Test Point
Vcc/2
Input Pulse and Test Point
- 27 -
Device
CL
* CL= 30pF including Scope
and Jig Capacitance
Output Load
Revision 0.0
November 2002