K5A3X40YTC Datasheet, PDF (23/45 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM

K5A3x40YT(B)C
Preliminary
MCP MEMORY
DEVICE STATUS FLAGS
Flash memory has means to indicate its status of operation in the bank where a program or erase operation is in processes. Address
must include bank address being excuted internal routine operation. The status is indicated by raising the device status flag via cor-
responding DQ balls or the RY/ BY ball. The corresponding DQ balls are DQ7, DQ6, DQ5, DQ3 and DQ2. The status is as follows :
Table 13. Hardware Sequence Flags
Status
Programming
In Progress
Block Erase or Chip Erase
Erase Suspend Read
Erase Suspended
Block
Erase Suspend Read
Non-Erase Sus-
pended Block
Erase Suspend
Program
Non-Erase Sus-
pended Block
Exceeded
Time Limits
Programming
Block Erase or Chip Erase
Erase Suspend Program
DQ7
DQ7
0
1
Data
DQ7
DQ7
0
DQ7
DQ6
Toggle
Toggle
1
Data
Toggle
Toggle
Toggle
Toggle
DQ5
0
0
0
Data
0
1
1
1
NOTES:
1. DQ2 will toggle when the device performs successive read operations from the erase suspended block.
2. If DQ5 is High (exceeded timing limits), successive reads from a problem block will cause DQ2 to toggle.
DQ3
0
1
0
Data
0
0
1
0
DQ2
1
Toggle
Toggle
(Note 1)
Data
1
No
Toggle
(Note 2)
No
Toggle
RY/BY
0
0
1
1
0
0
0
0
DQ7 : Data Polling
When an attempt to read the device is made while executing the Internal Program, the complement of the data is written to DQ7 as
an indication of the Routine in progress. When the Routine is completed an attempt to access to the device will produce the true data
written to DQ7. When a user attempts to read the device during the Erase operation, DQ7 will be low. If the device is placed in the
Erase Suspend Mode, the status can be detected via the DQ7 ball. If the system tries to read an address which belongs to a block
that is being erased, DQ7 will be high. If a non-erased block address is read, the device will produce the true data to DQ7. If an
attempt is made to program a protected block, DQ7 outputs complements the data for approximately 1µs and the device then returns
to the Read Mode without changing data in the block. If an attempt is made to erase a protected block, DQ7 outputs complement
data in approximately 100us and the device then returns to the Read Mode without erasing the data in the block.
DQ6 : Toggle Bit
Toggle bit is another option to detect whether an Internal Routine is in progress or completed. Once the device is at a busy state,
DQ6 will toggle. Toggling DQ6 will stop after the device completes its Internal Routine. If the device is in the Erase Suspend Mode,
an attempt to read an address that belongs to a block that is being erased will produce a high output of DQ6. If an address belongs to
a block that is not being erased, toggling is halted and valid data is produced at DQ6.
If an attempt is made to program a protected block, DQ6 toggles for approximately 1us and the device then returns to the Read Mode
without changing the data in the block. If an attempt is made to erase a protected block, DQ6 toggles for approximately 100µs and
the device then returns to the Read Mode without erasing the data in the block.
DQ5 : Exceed Timing Limits
If the Internal Program/Erase Routine extends beyond the timing limits, DQ5 will go High, indicating program/erase failure.
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Revision 0.0
November 2002