K4S643232C Datasheet, PDF (8/43 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

K4S643232C
CMOS SDRAM
Parameter
Symbol
-55
Version
-60
-70
-80
Unit
-10
CLK cycle time
tCC(min)
5.5
6
7
8
10
ns
Row active to row active delay tRRD(min)
11
12
14
16
20
ns
RAS to CAS delay
tRCD(min)
16.5
18
21
20
20
ns
Row precharge time
tRP(min)
16.5
18
21
20
20
ns
Row active time
tRAS(min)
38.5
42
49
48
tRAS(max)
100
48
ns
us
Row cycle time
tRC(min)
55
60
70
70
70
ns
Row cycle time in Auto refresh tRFC(min)
66
72
70
70
70
ns
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket
code "NV". From the next generation, tRDL will be only 2CLK for every clock frequency.
6. A new command should be issued after self refersh exit followed by tRFC.
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
-55
-60
-70
-80
-10
Symbol
Unit Note
Min Max Min Max Min Max Min Max Min Max
CLK cycle time
CAS Latency=3
tCC
CAS Latency=2
5.5
6
7
8
10
1000
1000
1000
1000
1000 ns 1
-
-
-
10
12
CLK to valid
output delay
CAS Latency=3
-
5
- 5.5 - 5.5 -
6
-
6
tSAC
ns 1, 2
CAS Latency=2
-
-
-
-
-
-
-
6
-8
Output data
tOH
2
- 2.5 - 2.5 - 2.5 - 2.5 - ns 2
CAS Latency=3
2
- 2.5
CLK high pulse width
tCH
-
3
-
3
- 3.5 - ns 3
CAS Latency=2
-
-
-
CAS Latency=3
2
- 2.5
CLK low pulse width
tCL
-
3
-
3
- 3.5 - ns 3
CAS Latency=2
-
-
-
Input setup time
CAS Latency=3
1.5 - 1.5
1.75
tSS
-
-
2
- 2.5 - ns 3
CAS Latency=2
-
-
-
-
Input hold time
tSH
1
-
1
-
1
-
1
-
1
- ns 3
CLK to output in Low-Z
tSLZ
1
-
1
-
1
-
1
-
1
- ns 2
CLK to output
in Hi-Z
CAS Latency=3
-
5
- 5.5 - 5.5
-6-
6
tSHZ
ns
CAS Latency=2
-
-
-
-
-
-
-
6
-
8
Note : 1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
-8-
REV. 1.1 Nov. '99