K4S643232C Datasheet, PDF(17/43 Page) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

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K4S643232C Datasheet, PDF (17/43 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

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K4S643232C

4. CAS Interrupt (II) : Read Interrupted by Write & DQM

(a) CL=2, BL=4

CLK

i) CMD

DQM

ii) CMD

RD WR

D0 D1 D2 D3

DQM

iii) CMD

Hi-Z D0

DQM

iv) CMD

Hi-Z D0

DQM

(b) CL=3, BL=4

CLK

i) CMD

DQM

ii) CMD

Hi-Z

D0 D1 D2 D3

Note 1

RD WR

D0 D1 D2 D3

DQM

iii) CMD

D0 D1 D2 D3

DQM

iii) CMD

D0 D1 D2 D3

DQM

iv) CMD

Hi-Z D0

DQM

Hi-Z

D0 D1 D2 D3

Note 1

*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.

- 17

CMOS SDRAM

REV. 1.1 Nov. '99

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