K4S643232C Datasheet, PDF (33/43 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

K4S643232C
Read & Write Cycle with Auto Precharge I @Burst Length=4
CMOS SDRAM
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CLOCK
CKE
HIGH
CS
RAS
CAS
ADDR
RAa
RBb CAa
CBb
BA0
BA1
A10/AP
RAa
DQ
(CL=2)
RBb
QAa0 QAa1 QAa2 QAa3
DBb0 DBb1 DBb2 DBb3
DQ
(CL=3)
WE
QAa0 QAa1 QAa2 QAa3
DBb0 DBb1 DBb2 DBb3
DQM
Row Active
(A-Bank)
Read with
Auto Precharge
(A-Bank)
Row Active
(B-Bank)
Auto Precharge
Start Point
(A-Bank)
Write with
Auto Precharge
(B-Bank)
*Note : _{1. tRCD should be controlled to meet minimum tRAS before internal precharge start.}
(In the case of Burst Length=1 & 2, BRSW mode and Block write)
Auto Precharge
Start Point
(B-Bank)
: Don′t care
- 33
REV. 1.1 Nov. '99