K4S643232C Datasheet, PDF (15/43 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

K4S643232C
BASIC FEATURE AND FUNCTION DESCRIPTIONS
CMOS SDRAM
1. CLOCK Suspend
CLK
CMD
CKE
Internal
CKE
DQ(CL2)
DQ(CL3)
1) Clock Suspended During Write (BL=4
WR
Masked by CKE
D0 D1
D0 D1
D2 D3
D2 D3
Not Written
2) Clock Suspended During Read (BL=4)
RD
Masked by CKE
Q0 ^DQ01
Q0
Q2
Q3
Q1
Q2 Q3
Suspended Dout
2. DQM Operation
CLK
CMD
DQM
DQ(CL2)
DQ(CL3)
1) Write Mask (BL=4)
WR
D0 D1
D0 D1
Masked byDQM
D3
D3
DQM to Data-in Mask = 0
3) DQM with Clock Suspended (Full Page Read) ^{Note 2}
CLK
CMD
RD
CKE
DQM
DQ(CL2)
DQ(CL3)
Hi-Z
Q0
Q2
Hi-Z
Q1
2) Read Mask (BL=4)
RD
Masked by DQM
Hi-Z
Q0
Q2 Q3
Hi-Z _{Q1 Q2}
Q3
DQM to Data-out Mask = 2
Hi-Z
Q4
Hi-Z
Q3
Hi-Z
Q6 Q7 Q8
Hi-Z
Q5 Q6 Q7
*Note : 1. CKE to CLK disable/enable = 1CLK.
2. DQM makes data out Hi-Z after 2CLKs which should masked by CKE " L"
3. DQM masks both data-in and data-out.
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REV. 1.1 Nov. '99