K4S643232C Datasheet, PDF (34/43 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

K4S643232C
Read & Write Cycle with Auto Precharge II @Burst Length=4
CMOS SDRAM
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CLOCK
CKE
HIGH
CS
RAS
CAS
ADDR
Ra
BA0
BA1
A10/AP
Ra
DQ CL=2
Rb Ca
Cb
Ra
Rb
Ra
Qa0 Qa1 Qb0 Qb1 Qb2 Qb3
Ca
Da0 Da1
CL=3
Qa0 Qa1 Qb0 Qb1 Qb2 Qb3
Da0 Da1
WE
DQM
Row Active
(A-Bank)
Read with
Auto Pre
charge
(A-Bank)
Row Active
(B-Bank)
Read without Auto
precharge(B-Bank)
Auto Precharge
Start Point
(A-Bank)*
Precharge
(B-Bank)
Row Active
(A-Bank)
Write with
Auto Precharge
(A-Bank)
: Don't care
*Note:
* When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- if Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
auto precharge will start at B Bank read command input point .
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.
- 34
REV. 1.1 Nov. '99