K5T6432YT Datasheet, PDF (2/40 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 64M Bit 4Mx16 Four Bank NOR Flash Memory / 32M Bit 2Mx16 UtRAM

K5T6432YT(B)M
Multi-Chip Package MEMORY
64M Bit (4Mx16) Four Bank NOR Flash Memory / 32M Bit (2Mx16) UtRAM
MCP MEMORY
FEATURES
GENERAL DESCRIPTION
• Power Supply voltage : 2.7 to 3.3 V
The K5T6432YT(B)M featuring single 3.0V power supply is a
• Organization
Multi Chip Package Memory which combines 64Mbit Four Bank
- Flash : 4,194,304 x 16 bit
- UtRAM : 2,097,152 x 16 bit
• Access Time (@2.7V)
- Flash : 85 ns, UtRAM : 100 ns
• Power Consumption (typical value)
- Flash Read Current : 20 mA (@5MHz)
Sequential Page Read Current : 5 mA (@5MHz)
Program/Erase Current : 35 mA (Max.)
Flash and 32Mbit UtRAM.
The 64Mbit Flash memory is organized as 4M x16 bit and 32Mbit
UtRAM is organized as 2M x16 bit. The 64Mbit Flash memory is
the high performance non-volatile memory fabricated by CMOS
technology for peripheral circuit and DINOR IV(Diveded bit-line
NOR IV) architecture for the memory cell. All memory blocks are
locked and can be programmed or erased, when F-WP is low.
Standby mode/Deep Power mode : 0.1 µA
Using Software Lock Release function, program erase operation
- UtRAM Operating Current : 18 mA
can be executed.
Standby Current :120 µA
The 32Mbit UtRAM is fabricated by SAMSUNG’s advanced
Deep Power Down : 5 µA
• Secode(Security Code) Block : Extra 32KW Block (Flash)
• Block Group Protection / Unprotection (Flash)
• 128 words Page Program (Flash)
• Flash Bank Size : 4Mb / 4Mb / 28Mb / 28Mb
• Flash Endurance : 100,000 Program/Erase Cycles
CMOS technology using one transistor memory cell.
The device also supports deep power down mode for low standby
current. The K5T6432YT(B)M is suitable for use in program and
data memory of mobile communication system to reduce mount
area. This device is available in 81-ball TBGA Type package.
• Ambient Temperature : -25°C ~ 85°C
• Endurance : 100,000 Program/Erase Cycles
• Package :81 - ball TBGA Type - 10.8 x 10.4 mm, 0.8 mm pitch
BALL CONFIGURATION
1 2 3 4 5 6 7 8 9 10 ¹¹ 12
A ^{N.C N.C N.C}
B ^N.C N.C N.C
N.C N.C N.C
N.C N.C N.C
C
N.C
A7 LB F-WP WE A8 A11
D
A3 A6 UB F-RP ^{ZZ A19 A12 A15}
E
A2 A5 A18 F-RY/BY A20 A9 A13 A21
F
A1 A4 A17
A10 A14 N.C
G
A0 VSS DQ1
DQ6 N.C A16
H
F-CE OE DQ9 DQ3 DQ4 DQ13 DQ15 F-Vcc
J
CS DQ0 DQ10 F-Vcc Vcc DQ12 DQ7 ^Vss
K
DQ8 DQ2 DQ11 N.C DQ5 DQ14
L N.C N.C N.C
N.C N.C N.C
M ^{N.C N.C N.C}
N.C N.C N.C
81 Ball TBGA , 0.8mm Pitch
Top View (Ball Down)
BALL DESCRIPTION
Ball Name
A0 to A20
A21
DQ0 to DQ15
F-RP
F-WP
F-Vcc
Vcc
Vss
UB
LB
F-CE
ZZ
WE
OE
F-RY/BY
N.C
Description
Address Input Balls (Common)
Address Input Ball (Flash Memory)
Data Input/Output Balls (Common)
Hardware Reset (Flash Memory)
Write Protect (Flash Memory)
Power Supply (Flash Memory)
Power Supply (UtRAM))
Ground (Common)
Upper Byte Enable (UtRAM)
Lower Byte Enable (UtRAM)
Chip Enable (Flash Memory)
Deep Power Down (UtRAM)
Write Enable (Common)
Output Enable (Common)
Ready/Busy (Flash memory)
No Connection
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
-2-
Revision 1.0
November 2001