K5T6432YT Datasheet, PDF (15/40 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 64M Bit 4Mx16 Four Bank NOR Flash Memory / 32M Bit 2Mx16 UtRAM

K5T6432YT(B)M
MCP MEMORY
Software Command Definitions
TThe device operations are selected by writing specific software command into the Commnad User Interface.
Read Array Command (FFH)
The device is in Read Array mode on initial device power up and after exit from deep power down, or by writing FFH to the Com-
mand User Interface. After starting the internal operation the device is set to the read status register mode automatically.
Sequential Page Read Command (F3H)
The Sequential Page Read command (F3H) timing can be used by writing the first command. This command is fast sequential 8
words read. During the read it is necessary to fix F-CE low and increase the addresses sequentially from 0h to 7h. The mode is kept
until Read Array command is input. The first read of Seq. Page Read timing is the same as normal read (ta(CE)). F-CE should be
fallen “L”. The read timing after the first is fast read (ta(PAD)). When an another sequential page (A21-A3) is accessed before one
sequential page (one 8-word) read is not finished, once F-CE is at VIH and A2-A0 data are 0h, after that F-CE is at VIL we can use
the first read of Seq. Page Read or normal read (ta(CE)).
Read Device Identifier Command (90H)
We can normally read device identifier codes when Read Device Identifier Code Command (90H) is written to the command latch.
Following the command write, the manufacturer code and the device code can be read from address 0000H and 0001H, respec-
tively.
Read Status Register Command (70H)
The Status Register is read after writing the Read Status Register command of 70H to the Command User Interface. Also, after
starting the internal operation the device is set to the Read Status Register mode automatically. The contents of Status Register are
latched on the later falling edge of OE must be toggled every status read.
Clear Status Register Command (50H)
The Erase Status, Program Status and Block Status bits are set to "1"s by the Write State Machine and can only be reset by the
Clear Status Register command of 50H. These bits indicate various failure conditions. status read.
Block Erase / Confirm Command (20H/D0H)
Automated block erase is initiated by writing the Block Erase command of 20H followed by the Confirm command of D0H. An
address within the block to be erased is required. The WSM executes iterative erase pulse application and erase verify operation.
Program Commands
1) Word Program (40H)
Word program is executed by a two-command sequence. The Word program Setup command of 40H is written to the Command
Interface, followed by a second write specifying the address and data to be written. The WSM controls the program pulse application
and verify operation.
2) Page Program for Data Blocks (41H)
Page Program allows fast programming of 128words of data. Writing of 41H initiates the page program operation for the Data area.
From 2nd cycle to 129th cycle, write data must be serially inputted. Address A6-A0 have to be incremented from 00H to 7FH. After
completion of data loading, the WSM controls the program pulse application and verify operation.
3) Single Data Load to Page Buffer (74H) / Page Buffer to Flash (0EH/D0H)
Single data load to the page buffer is performed by writing 74H followed by a second write specifying the column address and data.
Distinct data up to 128word can be loaded to the page buffer by this two-command sequence. On the other hand, all of the loaded
data to the page buffer is programmed simultaneously by writing Page Buffer to Flash command of 0EH followed by the
confirm command of D0H. After completion of programming the data on the page buffer is cleared automatically.
- 15 -
Revision 1.0
November 2001