S5D0127X01 Datasheet, PDF (18/96 Pages) Samsung semiconductor – MULTISTANDARD VIDEO DECODER/SCALER

S5D0127X01 Data Sheet
MULTIMEDIA VIDEO
SCH
ODD
PID
VS
HS
Figure 10. Line to Line VS, SCH and PID Timing (PAL input)
1.3. HORIZONTAL LUMA PROCESSING
A simplified block diagram for the luma path is shown in Figure 11.
FROM ADC
Contrast
Control
CONT
Decimation
Filter
Horizontal
Peaking
HYBWR
HYBWI
HYPK
Chroma
Trap
Programmable
Low Pass Filter
Brightness
Control
CTRAP
HYLPF
BRT
Figure 11. Horizontal Luma Processing Unit
1.3.1. Luminance DC Gain
The S5D0127X01 can accommodate CCIR 624 M/N/H/G standards, which fall into categories of -40 or -43 sync tip
and inclusion or exclusion of 7.5 setup. The S5D0127X01 can produce correct CCIR 601 luminance output levels
by controlling the gain and offset in the luminance path via PED. This register should be set for the appropriate
input standard. The programmable CONT and BRT registers provide the user with additional flexibility to create
non-standard luminance gain and offset values.
ELECTRONICS
Modified on May/04/2000
PAGE 18 OF 96