7733 Datasheet, PDF (482/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

LOW VOLTAGE VERSION
18.4 Electrical characteristics
18.4.6 Ready and Hold
Timing requirements (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz (Note), unless
otherwise noted)
g The rise/fall time of an input signal must be 100 ns or less, unless otherwise noted.
Symbol
tsu(RDY–φ1)
tsu(HOLD–φ1)
th(φ1–RDY)
th(φ1–HOLD)
____
RDY input setup time
_____
HOLD input setup time
____
RDY input hold time
_____
HOLD input hold time
Parameter
Limits
Unit
Min. Max.
80
ns
80
ns
0
ns
0
ns
Note: This is applied to the case where the main clock division selection bit = “0” and f(f2) = 6 MHz.
Switching characteristics (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz, unless
otherwise noted)
Symbol
Parameter
_____
td(φ1–HLDA) HLDA output delay time
Conditions
Fig. 18.4.1
Limits
Min. Max.
Unit
120 ns
18–16
7733 Group User’s Manual