7733 Datasheet, PDF (430/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATIONS
17.1 Memory expansion
(3) ROM and SRAM expansion example on maximum model
Figure 17.1.17 shows an expansion example for ROM and SRAM on the maximum model (with two
32-Kbyte ROMs and two 32-Kbyte SRAMs, microprocessor mode). Figure 17.1.18 shows the corre-
sponding timing diagram.
M37733S4BFP
CNVSS
BYTE ^{A1 to A7}
A8/D8 to
A15/D15
ALE
A16/D0
Address bus
M5M27C256AK-15
AC573 ^{g2 A8 to A15}
DQ
CE
LE
A0 to A14
g2
AC573
A16
DQ
LE
A1 to A15
D8 to D15
D0 to D7
CE
A0 to A14
A1 to A15
D0 to D7
D0 to D7
M5M5256CP-70LL
g1
AC04
S
A0 to A14
A1 to A15
S
A0 to A14
A1 to A15
D8 to D15
DQ1 to DQ8
D0 to D7
DQ1 to DQ8
D1 to D7
R/W
E
OE
Data bus (odd)
Data bus (even)
AC04
AC32 ^g3
RD
WE
OE
OE W
OE W
A0
BHE
XIN XOUT
20 MHz
WO
AC32
Circuit conditions: Wait 1 is valid,
1=
f(XIN)
2,
f(XIN)
8,
f(XIN)
f(XCIN)
or
16 ,
2
g1, g2 Make sure that the following relationship is satisfied:
q The sum of propagation delay time of g1 and that of
g2 is 90 ns or less.
g2 Make sure that the propagation delay time is 10 ns or less.
g3 Make sure that the propagation delay time is 15 ns or less.
Memory map
000016
008016
SFR area
Internal RAM
area
088016 _{External ROM}
area
(M5M27C256AK!2)
1000016
1FFFF16
External RAM
area
(M5M5256CP!2)
Fig. 17.1.17 Expansion example for ROM and SRAM on maximum model
7733 Group User’s Manual
17–23