7733 Datasheet, PDF (385/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

ELECTRICAL CHARACTERISTICS
15.5 Internal peripheral devices
15.5 Internal peripheral devices
Timing requirements (Vcc = 5 V ± 10 %, Vss = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Note 1), unless
otherwise noted)
g The rise/fall time of an input signal must be 100 ns or less, unless otherwise noted.
Timer A input (Count input in event counter mode)
Symbol
Parameter
tc(TA)
tw(TAH)
tw(TAL)
TAiIN input cycle time
TAiIN input high-level pulse width
TAiIN input low-level pulse width
Limits
Unit
Min. Max.
80
ns
40
ns
40
ns
Timer A input (Gating input in timer mode)
Symbol
Parameter
tc(TA)
TAiIN input cycle time (Note 3)
tw(TAH)
TAiIN input high-level pulse width (Note 3)
tw(TAL)
TAiIN input low-level pulse width (Note 3)
Data formula (Min.)
8 ! 10⁹
2!f(f2)
4 ! 10⁹
2!f(f2)
4 ! 10⁹
2!f(f2)
(Note 2)
(Note 2)
(Note 2)
Limits
Min. Max.
Unit
320
ns
160
ns
160
ns
Timer A input (External trigger input in one-shot pulse mode)
Symbol
Parameter
tc(TA)
tw(TAH)
tw(TAL)
TAiIN input cycle time
TAiIN input high-level pulse width
TAiIN input low-level pulse width
Data formula (Min.)
8 ! 10⁹
2!f(f2)
(Note 2)
Limits
Unit
Min. Max.
320
ns
80
ns
80
ns
Timer A input (External trigger input in pulse width modulation mode)
Symbol
Parameter
tw(TAH)
tw(TAL)
TAiIN input high-level pulse width
TAiIN input low-level pulse width
Limits
Unit
Min. Max.
80
ns
80
ns
Timer A input (Up-down input in event counter mode)
Symbol
Parameter
tc(UP)
tw(UPH)
tw(UPL)
tsu(UP–TIN)
th(TIN–UP)
TAiOUT input cycle time
TAiOUT input high-level pulse width
TAiOUT input low-level pulse width
TAiOUT input setup time
TAiOUT input hold time
Limits
Min. Max.
Unit
2000
ns
1000
ns
1000
ns
400
ns
400
ns
Notes 1: This is applied when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.
2: f(f2) represents the clock f2 frequency.
For the relationship with the main clock and sub clock, refer to Table 14.3.1.
3: The TAiIN input cycle time must be 4 cycles of a count source or more.
The TAiIN input high-level pulse width and low-level pulse width must be 2 cycles of a count source
or more, respectively.
15–6
7733 Group User’s Manual