7733 Datasheet, PDF (245/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

SERIAL I/O
8.3 Clock synchronous serial I/O mode
8.3.7 Processing when an overrun error is detected
In the clock synchronous serial I/O mode, an overrun error can be detected.
An overrun error occurs when the next data is prepared in the UARTi receive register with the receive
completion flag = “1” (in other words, data is present in the UARTi receive buffer register), and then the
next data is transferred to the receive buffer register. In other words, when the next data is prepared before
the contents of the UARTi receive buffer register is read out, an overrun error occurs. When an overrun
error occurs, the next data is written into the UARTi receive buffer register. At this time, the UARTi receive
interrupt request bit does not change.
An overrun error is detected when data is transferred from the UARTi receive register to the UARTi receive
buffer register. At this time, the overrun error flag is set to “1.” The overrun error flag is cleared to “0” when
the serial I/O mode selection bits are cleared to “0002” or when the receive enable bit is cleared to “0.”
When an overrun error occurs during reception, initialize the overrun error flag and the UARTi receive
buffer register, and then perform reception again. When it is necessary to perform transmission owing to
an overrun error which occurs in the receiver side, set the UARTi transmission buffer register again, and
then starts transmission again.
The method of initializing the UARTi receive buffer register and that of setting the UARTi transmission
buffer register again are described below.
(1) Method of Initializing UARTi receive buffer register
Œ Clear the receive enable bit to “0.” (Reception is disabled.)
 Set the receive enable bit to “1” again. (Reception is enabled.)
(2) Method of setting UARTi transmission buffer register again
Œ Clear the serial I/O mode selection bits to “0002.” (Serial I/O is ignored.)
 Set the serial I/O mode selection bits to “0012” again.
Ž Set the transmit enable bit to “1.” (Transmission is enabled.) And set the transmit data to the UARTi
transmission buffer register.
8–42
7733 Group User’s Manual