7733 Datasheet, PDF (465/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

(4) Approximate flowchart
APPLICATIONS
17.5 Timer B
Main routine
Oscillation circuit control register (address 6F 16)
Count start flag (address 40 16)
“8016”
“C016”
Clock prescaler is initialized.
A value of “8016” is written to address 6F 16 by executing the LDM instruction.
Count start flag
Counting for timers B1 and B2 start
Timer B2 interrupt routine
Count-up processing for clock Counted up every minute
RTI
INT0 interrupt routine
g By software initial settings, interrupt priority level is set as follows:
q Timer B2 < INT0
INT0 level/edge selection bit = “?” ^{1: Rising edge (“L” “H”)}
(bit 4 at address 7D 16)
0: Falling edge (“H” “L”)
INT0 interrupt control register
(address 7D16)
INT0 interrupt control register
(address 7D16)
“11 16”
INT0 interrupt polarity is
selected.
(Rising edge: “L” “H”)
“01 16”
INT0 interrupt polarity is
selected.
(Falling edge: “H” “L”)
Timer B1 count start flag “0”
(bit 6 at address 40 16)
Counting for timer B1 stops.
Timer B1 register FFFF 16
(addresses 5316 and 5216)
Timer B1 count start flag “1 ”
(bit 6 at address 40 16)
Counting for timer B1 starts.
0: No request
Timer B2 interrupt request bit = ?
(bit 3 at address 7C 16)
Timer B1 interrupt request bit = ? ^{1: Requested}
(bit 3 at address 7B 16)
1: Requested
Timer B1 count start flag “0”
(bit 6 at address 40 16)
Timer B1 register FFFE 16
(addresses 5316 and 5216)
Counting for timer B1 stops.
0: No request
Display urging user to set time again
Count value of timers B1 and B2
Clock counter
Timer B1 count start flag “1”
(bit 6 at address 40 16)
Counting for timer B1 starts.
By setting interrupt priority level, interrupts
other than INT0 are disabled.
System clock stop bit at wait state
(bit 5 at address 6C 16) “1”
Make INT0 interrupt priority level higher.
WIT instruction
Make INT0 interrupt priority level to the
former level.
RTI
Fig. 17.5.5 Approximate flowchart
7733 Group User’s Manual
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