7733 Datasheet, PDF (234/940 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

SERIAL I/O
8.3 Clock synchronous serial I/O mode
[When not using interrupts]
Checking the start of transmission
UART0 transmission interrupt control register (address 71 16)
UART1 transmission interrupt control register (address 73 16)
A-D/UART2 trans./rece. interrupt control register (address 70 16)
b7
b0
Interrupt request bit
0: No interrupt request has occurred.
1: Interrupt request has occurred.
(Transmission has been started.)
[When using interrupts]
A UARTi transmission interrupt request
occurs when the transmission is started.
UARTi transmission interrupt
Checking the completion of transmission
UART0 transmit/receive control register 0 (address 34 16)
UART1 transmit/receive control register 0 (address 3C 16)
UART2 transmit/receive control register 0 (address 68 16)
b7
b0
g _{This diagram indicates bits and registers required}
for processing.
Refer to Figure 8.3.8 for details about the change
of flag status and the occurrence timing of an
interrupt request.
Transmission register empty flag
0: Transmission is in progress.
1: Transmission is completed.
Note: Nothing is allocated to bits 7 to 4 of the UART2
transmit/receive control register 0.
Processing at completion of transmission
Fig. 8.3.6 How to detect of transmit completion
7733 Group User’s Manual
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