HD6433694 Datasheet, PDF (300/432 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

3. Sequential Read
This is a mode to read the data sequentially. Data is sequential read by either a current address
read or a random address read. If the EEPROM receives acknowledgement "0" after 1-byte
read data is output, the read address is incremented and the next 1-byte read data are coming
out. Data is output sequentially by incrementing addresses as long as the EEPROM receives
acknowledgement "0" after the data is output. The address will roll over and returns address
zero if it reaches the last address H'01FF. The sequential read can be continued after roll over.
The sequential read is terminated if the EEPROM receives acknowledgement "1" and a
following stop condition as the same manner as in the random address read.
The condition of a sequential read when the current address read is used is shown in figure
17.7.
SCL
SDA
1 2 34 5 6 7891
89
D7
D0
1
89
D7
D0
Start
condition
Slave address
R/W ACK Read Data ACK · · · ·
Legend:R/W: R/W code (0 is for a write and 1 is for a read)
ACK: acknowledge
Read Data ACK
Stop
conditon
Figure 17.7 Sequential Read Operation (when current address read is used)
17.5 Usage Notes
17.5.1 Data Protection at V_CC On/Off
When V_CC is turned on or off, the data might be destroyed by malfunction. Be careful of the
notices described below to prevent the data to be destroyed.
1. SCL and SDA should be fixed to V_CC or V_SS during V_CC on/off.
2. V_CC should be turned off after the EEPROM is placed in a standby state.
3. When V_CC is turned on from the intermediate level, malfunction is caused, so V_CC should be
turned on from the ground level (V_SS).
4. V_CC turn on speed should be longer than 10 us.
Rev. 4.00, 03/04, page 272 of 400