HD6433694 Datasheet, PDF (11/432 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

6.3 Operating Frequency in Active Mode............................................................................... 82
6.4 Direct Transition ............................................................................................................... 82
6.4.1 Direct Transition from Active Mode to Subactive Mode .................................... 82
6.4.2 Direct Transition from Subactive Mode to Active Mode .................................... 83
6.5 Module Standby Function................................................................................................. 83
Section 7 ROM ..................................................................................................85
7.1 Block Configuration.......................................................................................................... 85
7.2 Register Descriptions ........................................................................................................ 86
7.2.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 87
7.2.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 88
7.2.3 Erase Block Register 1 (EBR1) ........................................................................... 88
7.2.4 Flash Memory Power Control Register (FLPWCR) ............................................ 89
7.2.5 Flash Memory Enable Register (FENR) .............................................................. 89
7.3 On-Board Programming Modes........................................................................................ 90
7.3.1 Boot Mode ........................................................................................................... 90
7.3.2 Programming/Erasing in User Program Mode..................................................... 93
7.4 Flash Memory Programming/Erasing ............................................................................... 94
7.4.1 Program/Program-Verify ..................................................................................... 94
7.4.2 Erase/Erase-Verify............................................................................................... 96
7.4.3 Interrupt Handling when Programming/Erasing Flash Memory.......................... 97
7.5 Program/Erase Protection ................................................................................................. 99
7.5.1 Hardware Protection ............................................................................................ 99
7.5.2 Software Protection.............................................................................................. 99
7.5.3 Error Protection.................................................................................................... 99
7.6 Programmer Mode ............................................................................................................ 100
7.7 Power-Down States for Flash Memory............................................................................. 100
Section 8 RAM ..................................................................................................101
Section 9 I/O Ports .............................................................................................103
9.1 Port 1................................................................................................................................. 103
9.1.1 Port Mode Register 1 (PMR1) ............................................................................. 104
9.1.2 Port Control Register 1 (PCR1) ........................................................................... 105
9.1.3 Port Data Register 1 (PDR1)................................................................................ 105
9.1.4 Port Pull-Up Control Register 1 (PUCR1)........................................................... 106
9.1.5 Pin Functions ....................................................................................................... 106
9.2 Port 2................................................................................................................................. 108
9.2.1 Port Control Register 2 (PCR2) ........................................................................... 109
9.2.2 Port Data Register 2 (PDR2)................................................................................ 109
9.2.3 Pin Functions ....................................................................................................... 109
9.3 Port 5................................................................................................................................. 111
9.3.1 Port Mode Register 5 (PMR5) ............................................................................. 112
Rev. 4.00, 03/04, page xi of xxviii