HD6433694 Datasheet, PDF (10/432 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

3.4 Interrupt Exception Handling ........................................................................................... 55
3.4.1 External Interrupts ............................................................................................... 55
3.4.2 Internal Interrupts ................................................................................................ 56
3.4.3 Interrupt Handling Sequence ............................................................................... 56
3.4.4 Interrupt Response Time...................................................................................... 58
3.5 Usage Notes ...................................................................................................................... 60
3.5.1 Interrupts after Reset............................................................................................ 60
3.5.2 Notes on Stack Area Use ..................................................................................... 60
3.5.3 Notes on Rewriting Port Mode Registers ............................................................ 60
Section 4 Address Break ................................................................................... 61
4.1 Register Descriptions........................................................................................................ 61
4.1.1 Address Break Control Register (ABRKCR) ...................................................... 62
4.1.2 Address Break Status Register (ABRKSR) ......................................................... 63
4.1.3 Break Address Registers (BARH, BARL)........................................................... 63
4.1.4 Break Data Registers (BDRH, BDRL) ................................................................ 63
4.2 Operation .......................................................................................................................... 64
Section 5 Clock Pulse Generators ..................................................................... 67
5.1 System Clock Generator ................................................................................................... 68
5.1.1 Connecting Crystal Resonator ............................................................................. 68
5.1.2 Connecting Ceramic Resonator ........................................................................... 69
5.1.3 External Clock Input Method .............................................................................. 69
5.2 Subclock Generator........................................................................................................... 70
5.2.1 Connecting 32.768-kHz Crystal Resonator ......................................................... 70
5.2.2 Pin Connection when Not Using Subclock.......................................................... 71
5.3 Prescalers .......................................................................................................................... 71
5.3.1 Prescaler S ........................................................................................................... 71
5.3.2 Prescaler W.......................................................................................................... 71
5.4 Usage Notes ...................................................................................................................... 72
5.4.1 Note on Resonators.............................................................................................. 72
5.4.2 Notes on Board Design ........................................................................................ 72
Section 6 Power-Down Modes.......................................................................... 73
6.1 Register Descriptions........................................................................................................ 73
6.1.1 System Control Register 1 (SYSCR1) ................................................................. 74
6.1.2 System Control Register 2 (SYSCR2) ................................................................. 76
6.1.3 Module Standby Control Register 1 (MSTCR1) ................................................. 77
6.2 Mode Transitions and States of LSI.................................................................................. 78
6.2.1 Sleep Mode .......................................................................................................... 80
6.2.2 Standby Mode...................................................................................................... 81
6.2.3 Subsleep Mode..................................................................................................... 81
6.2.4 Subactive Mode ................................................................................................... 82
Rev. 4.00, 03/04, page x of xxviii