NS32CG16-10 Datasheet, PDF (9/82 Pages) National Semiconductor (TI) – High-Performance Printer / Display Processor

2 0 Architectural Description (Continued)
2 2 MEMORY ORGANIZATION
The main memory of the NS32CG16 is a uniform linear ad-
dress space Memory locations are numbered sequentially
starting at zero and ending at 2²⁴ b 1 The number specify-
ing a memory location is called an address The contents of
each memory location is a byte consisting of eight bits Un-
less otherwise noted diagrams in this document show data
stored in memory with the lowest address on the right and
the highest address on the left Also when data is shown
vertically the lowest address is at the top of a diagram and
the highest address at the bottom of the diagram When bits
are numbered in a diagram the least significant bit is given
the number zero and is shown at the right of the diagram
Bits are numbered in increasing significance and toward the
left
7
0
A
Byte at Address A
Two contiguous bytes are called a word Except where not-
ed the least significant byte of a word is stored at the lower
address and the most significant byte of the word is stored
at the next higher address In memory the address of a
word is the address of its least significant byte and a word
may start at any address
15
87
0
Aa1
A
MSB
LSB
Word at Address A
Two contiguous words are called a double-word Except
where noted the least significant word of a double-word is
stored at the lowest address and the most significant word
of the double-word is stored at the address two higher In
memory the address of a double-word is the address of its
least significant byte and a double-word may start at any
address
31
24 23
16 15
87
0
Aa3
Aa2
Aa1
A
MSB
LSB
Double Word at Address A
Although memory is addressed as bytes it is actually orga-
nized as words Therefore words and double-words that are
aligned to start at even addresses (multiples of two) are
accessed more quickly than words and double-words that
are not so aligned
2 3 MODULAR SOFTWARE SUPPORT
The NS32CG16 provides special support for software mod-
ules and modular programs
Each module in a NS32CG16 software environment con-
sists of three components
1 Program Code Segment
This segment contains the module’s code and constant
data
2 Static Data Segment
Used to store variables and data that may be accessed
by all procedures within the module
3 Link Table
This component contains two types of entries Absolute
Addresses and Procedure Descriptors
An Absolute Address is used in the external addressing
mode in conjunction with a displacement and the current
MOD Register contents to compute the effective address
of an external variable belonging to another module
The Procedure Descriptor is used in the call external pro-
cedure (CXP) instruction to compute the address of an
external procedure
Normally the linker program specifies the locations of the
three components The Static Data and Link Table typically
reside in RAM the code component can be either in RAM or
in ROM The three components can be mapped into non-
contiguous locations in memory and each can be indepen-
dently relocated Since the Link Table contains the absolute
addresses of external variables the linker need not assign
absolute memory addresses for these in the module itself
they may be assigned at load time
To handle the transfer of control from one module to anoth-
er the NS32CG16 uses a module table in memory and two
registers in the CPU
The Module Table is located within the first 64 kbytes of
memory This table contains a Module Descriptor (also
called a Module Table Entry) for each module in the ad-
dress space of the program A Module Descriptor has four
32-bit entries corresponding to each component of a mod-
ule
 The Static Base entry contains the address of the begin-
ning of the module’s static data segment
 The Link Table Base points to the beginning of the mod-
ule’s Link Table
 The Program Base is the address of the beginning of the
code and constant data for the module
 A fourth entry is currently unused but reserved
The MOD Register in the CPU contains the address of the
Module Descriptor for the currently executing module
The Static Base Register (SB) contains a copy of the Static
Base entry in the Module Descriptor of the currently execut-
ing module i e it points to the beginning of the current
module’s static data area
This register is implemented in the CPU for efficiency pur-
poses By having a copy of the static base entry or chip the
CPU can avoid reading it from memory each time a data
item in the static data segment is accessed
In an NS32CG16 software environment modules need not
be linked together prior to loading As modules are loaded
a linking loader simply updates the Module Table and fills
the Link Table entries with the appropriate values No modi-
fication of a module’s code is required Thus modules may
be stored in read-only memory and may be added to a sys-
tem independently of each other without regard to their in-
dividual addressing Figure 2-4 shows a typical NS32CG16
run-time environment
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