English
Language : 

NS32CG16-10 Datasheet, PDF (55/82 Pages) National Semiconductor (TI) – High-Performance Printer / Display Processor
4 0 Device Specifications (Continued)
4 4 TEST LOADING CHARACTERISTICS
Signal Name
HBE ST0–3 U S
ILO HLDA PFS
BPU RST0 RD
WR TSO DBE
FCLK DDIN ADS
Capacitive
Loading
50 pF
High Level
Output Voltage
(IOH e b400 mA)
Low Level
Output Voltage
(IOL e 4 mA)
Input Load
Current
(0 s VIN s VCC)
High Level
Input Voltage
Low Level
Input Voltage
2 0VsVOHsVCCa0 5V b0 5VsVOLs0 8V b20 mAsIIs20 mA 2 0VsVIHsVCCa0 5V b0 5VsVILs0 45V
RSTI HOLD INT
NMI CWAIT WAIT1–2
50 pF
b20 mAsIIs20 mA 2 0VsVIHsVCCa0 5V b0 5VsVILs0 8V
OSCIN
AD0–15 A16–23
CTTL
50 pF
100 pF
2 0VsVOHsVCCa0 5V
b0 5VsVOLs0 8V
b20 mAsIIs20 mA
b20 mAsIIs20 mA
4 5VsVIHsVCCa0 5V
2 4VsVIHsVCCa0 5V
b0 5VsVILs0 5V
b0 5VsVILs0 45V
PHI1 PHI2
30 pF
(Note 2)
(Note 2)
SPC
30 pF
2 0VsVOHsVCCa0 5V b0 5VsVOLs0 8V 50 mAsIIs1 0 mA 2 0VsVIHsVCCa0 5V b0 5VsVILs0 4V
OSCOUT
(Note 1)
see Table
3-1
2 0VsVOHsVCCa0 5V b0 5VsVOLs0 8V
Note 1 The maximum capacitive loading of OSCOUT is given in Table 3-1 when the NS32CG16’s oscillator is driven with a crystal If a single phase clock source is
used OSCOUT should be left unconnected or loaded with no more than 5 pF of stray capacitance
Note 2 As stated in Table 4 5 2
TL EE 9424 – 65
FIGURE 4 2 Test Loading Configuration
4 5 SWITCHING CHARACTERISTICS
4 5 1 Definitions
All the timing specifications given in this section refer to
0 8V or 2 0V on the rising or falling edges of all the signals
as illustrated in Figures 4-3 and 4-4 unless specifically stat-
ed otherwise The capacitive load is assumed to be 100 pF
on CTTL and 50 pF on all the other output signals
TL EE 9424 – 77
FIGURE 4 3 Output Signals Specification Standard
Abbreviations
L E Leading Edge
T E Trailing Edge
R E Rising Edge
F E Falling Edge
TL EE 9424 – 78
FIGURE 4 4 Input Signals Specification Standard
55