MC68HC908RF2 Datasheet, PDF (69/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Central Processor Unit (CPU)
CPU Registers
5.4.4 Program Counter
The program counter is a 16-bit register that contains the address of the
next instruction or operand to be fetched.
Normally, the program counter automatically increments to the next
sequential memory location every time an instruction or operand is
fetched. Jump, branch, and interrupt operations load the program
counter with an address other than that of the next sequential location.
During reset, the program counter is loaded with the reset vector
address located at $FFFE and $FFFF. The vector address is the
address of the first instruction to be executed after exiting the reset state.
Bit
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read:
Write:
Reset:
Loaded with vector from $FFFE and $FFFF
Figure 5-5. Program Counter (PC)
5.4.5 Condition Code Register
The 8-bit condition code register (CCR) contains the interrupt mask and
five flags that indicate the results of the instruction just executed. Bits 6
and 5 are set permanently to logic 1. The following paragraphs describe
the functions of the condition code register.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
V
1
1
H
I
N
Z
C
Write:
Reset: X
1
1
X
1
X
X
X
X = Indeterminate
Figure 5-6. Condition Code Register (CCR)
MC68HC908RF2 — Rev. 1
MOTOROLA
Central Processor Unit (CPU)
Advance Information
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