MC68HC908RF2 Datasheet, PDF (107/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Break Module (BRK)
Break Module Registers
7.6.1 Break Status and Control Register
The break status and control register (BSCR) contains break module
enable and status bits.
Address: $FE0E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
0
0
BRKE BRKA
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 7-3. Break Status and Control Register (BSCR)
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches.
Clear BRKE by writing a logic 0 to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
BRKA — Break Active Bit
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
1 = Break address match
0 = No break address match
MC68HC908RF2 — Rev. 1
MOTOROLA
Break Module (BRK)
Advance Information
107