MC68HC908RF2 Datasheet, PDF (170/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Low-Voltage Inhibit (LVI)
12.3 Features
Features of the LVI module include:
• Two levels of low-voltage condition are detected:
– Low-voltage detection
– Low-voltage reset
• User-configurable for stop mode
12.4 Functional Description
Figure 12-1 shows the structure of the LVI module. The LVI module
contains a bandgap reference circuit and two comparators. The LVI
monitors V_DD voltage during normal MCU operation. When enabled, the
LVI module generates a reset when V_DD falls below the V_LVR threshold.
In addition to forcing a reset condition, the LVI module has a second
circuit dedicated to low-voltage detection. When V_DD falls below V_LVS,
the output of the low-voltage comparator asserts the LOWV flag in the
LVI status register (LVISR). In applications that require detecting low
batteries, software can monitor by polling the LOWV bit.
WEAK
BATTERY
DETECTOR
V_DD
STOP INSTRUCTION
LVI STOP BIT IN CONFIGURATION REGISTER
LVI PWR BIT IN CONFIGURATION REGISTER
LVIRST BIT IN CONFIGURATION REGISTER
DEAD
BATTERY
DETECTOR
V_DD > V_LVR = 0
V_DD ≤ V_LVR = 1
V_DD
LVITRIP
DIGITAL FILTER
CGMXCLK
RESET
V_DD > V_LVS = 0
V_DD ≤ V_LVS = 1
LOWV
LOWV FLAG
Figure 12-1. LVI Module Block Diagram
Advance Information
170
Low-Voltage Inhibit (LVI)
MC68HC908RF2 — Rev. 1
MOTOROLA