MC68HC908RF2 Datasheet, PDF (186/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Keyboard/External Interrupt Module (KBI)
Interrupt signals on the IRQ1 pin are latched into the IRQ1 latch.
Keyboard interrupts are latched in the keyboard interrupt latch. An
interrupt latch remains set until one of these actions occurs:
• Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears IRQ1 latch and keyboard interrupt
latch.
• Software clear — Software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (INTKBSCR). Writing a logic 1 to the ACKI bit
clears the IRQ1 latch. Writing a logic 1 to the ACKK bit clears the
keyboard interrupt latch.
• Reset — A reset automatically clears both interrupt latches.
The IRQ1 pin and keyboard interrupt pins are falling-edge triggered and
are software-configurable to be both falling-edge and low-level triggered.
The MODEI and MODEK bits in the INTKBSCR controls the triggering
sensitivity of the IRQ1 pin and keyboard interrupt pins.
When an interrupt pin is edge-triggered only, the interrupt latch remains
set until a vector fetch, software clear, or reset occurs.
When an interrupt pin is both falling-edge and low-level-triggered, the
interrupt latch remains set until both of these occur:
• Vector fetch or software clear
• Return of the interrupt pin to logic 1
The vector fetch or software clear may occur before or after the interrupt
pin returns to logic 1. As long as the pin is low, the interrupt request
remains pending. A reset will clear the latch, the MODEI and MODEK
control bits, thereby clearing the interrupt even if the pin stays low.
When set, the IMASKI and IMASKK bits in the INTKBSCR mask all
external interrupt requests. A latched interrupt request is not presented
to the interrupt priority logic unless the corresponding IMASK<x> bit is
clear.
Advance Information
186
Keyboard/External Interrupt Module (KBI)
MC68HC908RF2
MOTOROLA