MC68HC908RF2 Datasheet, PDF (117/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Internal Clock Generator Module (ICG)
Functional Description
The amplifier is enabled when the ECGON bit is set and stop mode is
not enabled. When the amplifier is enabled, it will be connected between
the OSC1 and OSC2 pins. In its typical configuration, the external
oscillator requires five external components:
1. Crystal, X₁
2. Fixed capacitor, C₁
3. Tuning capacitor, C₂ (can also be a fixed capacitor)
4. Feedback resistor, R_B
5. Series resistor, R_S (included in the diagram to follow strict Pierce
oscillator guidelines and may not be required for all ranges of
operation, especially with high frequency crystals). Refer to the
crystal manufacturer’s data for more information.
8.4.3.2 External Clock Input Path
The external clock input path is the means by which the microcontroller
uses an external clock source. The input to the path is the OSC1 pin and
the output is the external clock (ECLK). The path, which contains input
buffering, is enabled when the ECGON bit is set and stop mode is not
enabled.
8.4.4 Clock Monitor Circuit
The ICG contains a clock monitor circuit which, when enabled, will
continuously monitor both the external clock (ECLK) and the internal
clock (ICLK) to determine if either clock source has failed based on these
conditions:
• Either ICLK or ECLK has stopped.
• The frequency of IBASE < frequency EREF divided by 4
• The frequency of ECLK < frequency of IREF divided by 4
Using the clock monitor requires both clocks to be active (ECGON and
ICGON are both set). To enable the clock monitor, both clocks must also
be stable (ECGS and ICGS both set). This is to prevent the use of the
clock monitor when a clock is first turned on and potentially unstable
MC68HC908RF2 — Rev. 1
MOTOROLA
Internal Clock Generator Module (ICG)
Advance Information
117