MC68HC908RF2 Datasheet, PDF (100/254 Pages) Motorola, Inc – HCMOS Microcontroller Unit

System Integration Module (SIM)
6.8.2 SIM Reset Status Register
This register contains six flags that show the source of the last reset. The
status register will clear automatically after reading it. A power-on reset
sets the POR bit.
Address: $FE01
Bit 7
6
5
4
3
2
1
Bit 0
Read: POR
PIN
COP ILOP ILAD
0
LVI
0
Write:
POR: 1
X
X
X
X
X
X
X
= Unimplemented X = Indeterminate
Figure 6-18. SIM Reset Status Register (SRSR)
POR — Power-On Reset Bit
1 = Last reset caused by POR circuit
0 = Read of SRSR
PIN — External Reset Bit
1 = Last reset caused by external reset pin (RST)
0 = Read of SRSR
COP — Computer Operating Properly Reset Bit
1 = Last reset caused by COP counter
0 = Read of SRSR
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = Read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = Read of SRSR
LVI — Low-Voltage Inhibit Reset Bit
1 = Last reset was caused by the LVI circuit
0 = Read of SRSR
Advance Information
100
System Integration Module (SIM)
MC68HC908RF2 — Rev. 1
MOTOROLA