PIC32MX1XX_12 Datasheet, PDF (51/328 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

TABLE 4-10: DMA GLOBAL REGISTER MAP
Bits
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
3000
DMACON
31:16
15:0
—
ON
—
—
—
—
—
—
— SUSPEND DMABUSY —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
— 0000
3010
DMASTAT
31:16
15:0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
—
RDWR
DMACH<2:0>⁽²⁾
0000
3020
DMAADDR
31:16
15:0
DMAADDR<31:0>
0000
0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more
information.
TABLE 4-11: DMA CRC REGISTER MAP
Bits
31/15 30/14 29/13 28/12 27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
3030
DCRCCON
31:16
15:0
—
—
—
—
BYTO<1:0>
—
WBO
—
—
PLEN<4:0>
BITO
—
—
—
—
CRCEN CRCAPP CRCTYP
—
—
—
—
—
—
CRCCH<2:0>
0000
0000
3040
DCRCDATA
31:16
15:0
DCRCDATA<31:0>
0000
0000
3050
DCRCXOR
31:16
15:0
DCRCXOR<31:0>
0000
0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for
more information.