PIC32MX1XX_12 Datasheet, PDF (320/328 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
Memory Organization.......................................................... 35
Layout ......................................................................... 35
Microchip Internet Web Site .............................................. 323
MPLAB ASM30 Assembler, Linker, Librarian ................... 240
MPLAB Integrated Development Environment Software .. 239
MPLAB PM3 Device Programmer..................................... 242
MPLAB REAL ICE In-Circuit Emulator System................. 241
MPLINK Object Linker/MPLIB Object Librarian ................ 240
O
Oscillator Configuration....................................................... 93
Output Compare................................................................ 161
P
Packaging ......................................................................... 295
Details ....................................................................... 297
Marking ..................................................................... 295
Parallel Master Port (PMP) ............................................... 183
PIC32 Family USB Interface Diagram............................... 120
Pinout I/O Descriptions (table) ............................................ 20
Power-on Reset (POR)
and On-Chip Voltage Regulator ................................ 235
Power-Saving Features..................................................... 219
CPU Halted Methods ................................................ 219
Operation .................................................................. 219
with CPU Running..................................................... 219
R
Reader Response ............................................................. 324
Real-Time Clock and Calendar (RTCC)............................ 191
Register Maps ............................................................... 40–68
Registers
[pin name]R (Peripheral Pin Select Input)................. 147
AD1CHS (ADC Input Select) .................................... 207
AD1CON1 (A/D Control 1) ........................................ 199
AD1CON1 (ADC Control 1) .............................. 199, 203
AD1CON2 (ADC Control 2) ...................................... 205
AD1CON3 (ADC Control 3) ...................................... 206
AD1CSSL (ADC Input Scan Select) ......................... 208
ALRMDATE (Alarm Date Value) ............................... 199
ALRMDATECLR (ALRMDATE Clear)....................... 199
ALRMDATESET (ALRMDATE Set) .......................... 199
ALRMTIME (Alarm Time Value) ............................... 198
ALRMTIMECLR (ALRMTIME Clear)......................... 199
ALRMTIMEINV (ALRMTIME Invert) ......................... 199
ALRMTIMESET (ALRMTIME Set) ............................ 199
BMXBOOTSZ (Boot Flash (IFM) Size ........................ 76
BMXCON (Bus Matrix Configuration) ......................... 71
BMXDKPBA (Data RAM Kernel Program
Base Address) .................................................... 72
BMXDRMSZ (Data RAM Size Register) ..................... 75
BMXDUDBA (Data RAM User Data Base Address) ... 73
BMXDUPBA (Data RAM User Program
Base Address) .................................................... 74
BMXPFMSZ (Program Flash (PFM) Size) .................. 76
BMXPUPBA (Program Flash (PFM) User Program
Base Address) .................................................... 75
CM1CON (Comparator 1 Control) ............................ 210
CMSTAT (Comparator Control Register) .................. 211
CNCONx (Change Notice Control for PORTx) ......... 148
CTMUCON (CTMU Control) ..................................... 216
CVRCON (Comparator Voltage Reference Control). 214
DCHxCON (DMA Channel ’x’ Control)...................... 109
DCHxCPTR (DMA Channel ’x’ Cell Pointer) ............. 116
DCHxCSIZ (DMA Channel ’x’ Cell-Size)................... 116
DCHxDAT (DMA Channel ’x’ Pattern Data) .............. 117
DCHxDPTR (Channel ’x’ Destination Pointer).......... 115
DCHxDSA (DMA Channel ’x’ Destination
Start Address)................................................... 113
DCHxDSIZ (DMA Channel ’x’ Destination Size)....... 114
DCHxECON (DMA Channel ’x’ Event Control)......... 110
DCHxINT (DMA Channel ’x’ Interrupt Control) ......... 111
DCHxSPTR (DMA Channel ’x’ Source Pointer)........ 115
DCHxSSA (DMA Channel ’x’ Source Start Address) 113
DCHxSSIZ (DMA Channel ’x’ Source Size).............. 114
DCRCCON (DMA CRC Control)............................... 106
DCRCDATA (DMA CRC Data) ................................. 108
DCRCXOR (DMA CRCXOR Enable) ....................... 108
DEVCFG0 (Device Configuration Word 0................. 224
DEVCFG1 (Device Configuration Word 1................. 226
DEVCFG2 (Device Configuration Word 2................. 228
DEVCFG3 (Device Configuration Word 3................. 230
DEVID (Device and Revision ID) .............................. 232
DMAADDR (DMA Address) ...................................... 105
DMAADDR (DMR Address)...................................... 105
DMACON (DMA Controller Control) ......................... 104
DMASTAT (DMA Status) .......................................... 105
I2CxCON (I2C Control)............................................. 173
I2CxSTAT (I2C Status) ............................................. 175
ICxCON (Input Capture ’x’ Control) .......................... 158
IFSx (Interrupt Flag Status) ........................................ 90
INTCON (Interrupt Control)......................................... 88
INTSTAT (Interrupt Status)......................................... 89
IPCx (Interrupt Priority Control) .................................. 91
NVMADDR (Flash Address) ....................................... 79
NVMCON (Programming Control) .............................. 78
NVMDATA (Flash Program Data)............................... 80
NVMKEY (Programming Unlock)................................ 79
NVMSRCADDR (Source Data Address) .................... 80
OCxCON (Output Compare ’x’ Control).................... 162
OSCCON (Oscillator Control) ..................................... 95
PMADDR (Parallel Port Address) ............................. 188
PMAEN (Parallel Port Pin Enable)............................ 189
PMCON (Parallel Port Control)................................. 184
PMMODE (Parallel Port Mode)................................. 186
PMSTAT (Parallel Port Status (Slave Modes Only).. 190
REFOCON (Reference Oscillator Control) ................. 99
REFOTRIM (Reference Oscillator Trim)................... 101
RPnR (Peripheral Pin Select Output) ....................... 147
RSWRST (Software Reset) ........................................ 83
RTCCON (RTC Control) ........................................... 192
RTCDATE (RTC Date Value) ................................... 197
RTCTIME (RTC Time Value).................................... 196
SPIxCON (SPI Control) ............................................ 164
SPIxCON2 (SPI Control 2) ....................................... 167
SPIxSTAT (SPI Status)............................................. 168
T1CON (Type A Timer Control) ................................ 150
TPTMR (Temporal Proximity Timer)........................... 89
TxCON (Type B Timer Control) ................................ 155
U1ADDR (USB Address) .......................................... 134
U1BDTP1 (USB BDT Page 1) .................................. 136
U1BDTP2 (USB BDT Page 2) .................................. 137
U1BDTP3 (USB BDT Page 3) .................................. 137
U1CNFG1 (USB Configuration 1)............................. 138
U1CON (USB Control).............................................. 132
U1EIE (USB Error Interrupt Enable) ......................... 130
U1EIR (USB Error Interrupt Status).......................... 128
U1EP0-U1EP15 (USB Endpoint Control) ................. 139
U1FRMH (USB Frame Number High) ...................... 135
U1FRML (USB Frame Number Low)........................ 134
U1IE (USB Interrupt Enable) .................................... 127
DS61168E-page 320
Preliminary
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