PIC32MX1XX_12 Datasheet, PDF (195/328 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 20-2: RTCALRM: RTC ALARM CONTROL REGISTER (CONTINUED)
bit 7-0 ARPT<7:0>: Alarm Repeat Counter Value bits⁽²⁾
11111111 = Alarm will trigger 256 times
•
•
•
00000000 = Alarm will trigger one time
The counter decrements on any alarm event. The counter only rolls over from 0x00 to 0xFF if CHIME = 1.
Note 1:
2:
3:
Hardware clears the ALRMEN bit anytime the alarm event occurs, when ARPT<7:0> = 00 and
CHIME = 0.
This field should not be written when the RTCC ON bit = ‘1’ (RTCCON<15>) and ALRMSYNC = 1.
This assumes a CPU read will execute in less than 32 PBCLKs.
Note: This register is reset only on a Power-on Reset (POR).
 2011-2012 Microchip Technology Inc.
Preliminary
DS61168E-page 195