PIC32MX1XX_12 Datasheet, PDF (149/328 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
12.0 TIMER1
Note 1: This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105) in the “PIC32 Family
Reference Manual”, which is available
from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
FIGURE 12-1:
TIMER1 BLOCK DIAGRAM
This family of PIC32 devices features one
synchronous/asynchronous 16-bit timer that can operate
as a free-running interval timer for various timing applica-
tions and counting external events. This timer can also
be used with the Low-Power Secondary Oscillator
(SOSC) for Real-Time Clock (RTC) applications. The
following modes are supported:
• Synchronous Internal Timer
• Synchronous Internal Gated Timer
• Synchronous External Timer
• Asynchronous External Timer
12.1 Additional Supported Features
• Selectable clock prescaler
• Timer operation during CPU Idle and Sleep mode
• Fast bit manipulation using CLR, SET and INV
registers
• Asynchronous mode can be used with the SOSC
to function as a Real-Time Clock (RTC)
PR1
Equal
16-bit Comparator
T1IF
Event Flag
Reset
0
1
TGATE
TMR1
QD
Q
TSYNC
1
Sync
0
TGATE
TCS
ON
SOSCO/T1CK
SOSCI
x1
SOSCEN
Gate
Sync
10
PBCLK
00
Prescaler
1, 8, 64, 256
2
TCKPS<1:0>
Note: The default state of the SOSCEN bit (OSCCON<1>) during a device Reset is controlled by the
FSOSCEN bit in Configuration Word, DEVCFG1.
 2011-2012 Microchip Technology Inc.
Preliminary
DS61168E-page 149