PIC32MX1XX_12 Datasheet, PDF (126/328 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 10-6: U1IR: USB INTERRUPT REGISTER
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6
Bit
Bit
Bit
Bit
Bit
29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
Bit
24/16/8/0
31:24
23:16
15:8
7:0
U-0
—
U-0
—
U-0
—
R/WC-0, HS
U-0
—
U-0
—
U-0
—
R/WC-0, HS
U-0
—
U-0
—
U-0
—
R/WC-0, HS
U-0
—
U-0
—
U-0
—
R/WC-0, HS
STALLIF ATTACHIF⁽¹⁾ RESUMEIF⁽²⁾ IDLEIF
U-0
—
U-0
—
U-0
—
R/WC-0, HS
TRNIF⁽³⁾
U-0
—
U-0
—
U-0
—
R/WC-0, HS
SOFIF
U-0
—
U-0
—
U-0
—
R-0
UERRIF⁽⁴⁾
U-0
—
U-0
—
U-0
—
R/WC-0, HS
URSTIF⁽⁵⁾
DETACHIF⁽⁶⁾
Legend:
R = Readable bit
-n = Value at POR
WC = Write ‘1’ to clear
W = Writable bit
‘1’ = Bit is set
HS = Hardware Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-8 Unimplemented: Read as ‘0’
bit 7 STALLIF: STALL Handshake Interrupt bit
1 = In Host mode a STALL handshake was received during the handshake phase of the transaction
In Device mode a STALL handshake was transmitted during the handshake phase of the transaction
0 = STALL handshake has not been sent
bit 6 ATTACHIF: Peripheral Attach Interrupt bit⁽¹⁾
1 = Peripheral attachment was detected by the USB module
0 = Peripheral attachment was not detected
bit 5 RESUMEIF: Resume Interrupt bit⁽²⁾
1 = K-State is observed on the D+ or D- pin for 2.5 µs
0 = K-State is not observed
bit 4 IDLEIF: Idle Detect Interrupt bit
1 = Idle condition detected (constant Idle state of 3 ms or more)
0 = No Idle condition detected
bit 3 TRNIF: Token Processing Complete Interrupt bit⁽³⁾
1 = Processing of current token is complete; a read of the U1STAT register will provide endpoint information
0 = Processing of current token not complete
bit 2 SOFIF: SOF Token Interrupt bit
1 = SOF token received by the peripheral or the SOF threshold reached by the host
0 = SOF token was not received nor threshold reached
bit 1 UERRIF: USB Error Condition Interrupt bit⁽⁴⁾
1 = Unmasked error condition has occurred
0 = Unmasked error condition has not occurred
bit 0 URSTIF: USB Reset Interrupt bit (Device mode)⁽⁵⁾
1 = Valid USB Reset has occurred
0 = No USB Reset has occurred
DETACHIF: USB Detach Interrupt bit (Host mode)⁽⁶⁾
1 = Peripheral detachment was detected by the USB module
0 = Peripheral detachment was not detected
Note 1:
2:
3:
4:
5:
6:
This bit is valid only if the HOSTEN bit is set (see Register 10-11), there is no activity on the USB for
2.5 µs, and the current bus state is not SE0.
When not in Suspend mode, this interrupt should be disabled.
Clearing this bit will cause the STAT FIFO to advance.
Only error conditions enabled through the U1EIE register will set this bit.
Device mode.
Host mode.
DS61168E-page 126
Preliminary
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