PIC18LF252-ISP Datasheet, PDF (46/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
FIGURE 4-7:
DATA MEMORY MAP FOR PIC18F252/452
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
Data Memory Map
00h
Bank 0
FFh
00h
Bank 1
FFh
00h
Bank 2
FFh
00h
Bank 3
FFh
Access RAM
GPR
GPR
GPR
GPR
Bank 4
GPR
00h
Bank 5
FFh
GPR
000h
07Fh
080h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
= 0110
= 1110
Bank 6
to
Bank 14
Unused
Read ’00h’
= 1111
00h
Bank 15
FFh
When a = 1,
the BSR is used to specify the
RAM location that the
instruction uses.
Unused
SFR
EFFh
F00h
F7Fh
F80h
FFFh
Access Bank
00h
Access RAM low
7Fh
Access RAM high ^80h
(SFR’s)
FFh
When a = 0,
the BSR is ignored and the
Access Bank is used.
The first 128 bytes are General
Purpose RAM (from Bank 0).
The second 128 bytes are
Special Function Registers
(from Bank 15).
DS39564C-page 44
© 2006 Microchip Technology Inc.